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MIPS: csrc-r4k: Refine rating computation
authorJiaxun Yang <jiaxun.yang@flygoat.com>
Wed, 12 Jun 2024 08:54:28 +0000 (09:54 +0100)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Wed, 3 Jul 2024 14:44:49 +0000 (16:44 +0200)
commitc171186c177970d3ec22dd814f2693f1f7fc1e7d
tree242fc8438c003e9a5358c607ea963d538f97600etree
parent04f38d1a4db017f17e82442727b91ce03dd72759commit | diff
MIPS: csrc-r4k: Refine rating computation

Increase frequency addend dividend to 10000000 (10MHz) to
reasonably accommodate multi GHz level mips_hpt_frequency.

Cap rating of csrc-r4k into 299 to ensure it doesn't go into
"Desired" range, given all the drama we have with CP0 count
registers (SMP sync, behaviour on wait etc).

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/kernel/csrc-r4k.c diff | blob | history
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