]> www.infradead.org Git - users/jedix/linux-maple.git/commit
cxl: Kill enum cxl_decoder_mode
authorDan Williams <dan.j.williams@intel.com>
Tue, 4 Feb 2025 04:24:29 +0000 (20:24 -0800)
committerDave Jiang <dave.jiang@intel.com>
Tue, 4 Feb 2025 20:48:19 +0000 (13:48 -0700)
commitbe5cbd0840275c68b3b7d0685d7acc26436c0d99
tree93e755d716d55e99d54c33d062bc5602d126a993
parent991d98f17d31644826977e49477544987000a08a
cxl: Kill enum cxl_decoder_mode

Now that the operational mode of DPA capacity (ram vs pmem... etc) is
tracked in the partition, and no code paths have dependencies on the
mode implying the partition index, the ambiguous 'enum cxl_decoder_mode'
can be cleaned up, specifically this ambiguity on whether the operation
mode implied anything about the partition order.

Endpoint decoders simply reference their assigned partition where the
operational mode can be retrieved as partition mode.

With this in place PMEM can now be partition0 which happens today when
the RAM capacity size is zero. Dynamic RAM can appear above PMEM when
DCD arrives, etc. Code sequences that hard coded the "PMEM after RAM"
assumption can now just iterate partitions and consult the partition
mode after the fact.

Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Alejandro Lucero <alucerop@amd.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Tested-by: Alejandro Lucero <alucerop@amd.com>
Link: https://patch.msgid.link/173864306972.668823.3327008645125276726.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
drivers/cxl/core/cdat.c
drivers/cxl/core/core.h
drivers/cxl/core/hdm.c
drivers/cxl/core/memdev.c
drivers/cxl/core/port.c
drivers/cxl/core/region.c
drivers/cxl/cxl.h
drivers/cxl/cxlmem.h