]> www.infradead.org Git - users/jedix/linux-maple.git/commit
drm/amdgpu/mes: Add cleaner shader fence address handling in MES for GFX11
authorSrinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Fri, 7 Feb 2025 09:30:03 +0000 (15:00 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 13 Feb 2025 02:05:49 +0000 (21:05 -0500)
commitbe2560e4b8288e9a8794cfa5db32614ce61a0068
tree35b0e856b9435f51f274ce2f0ce2c403433199f9
parent16a5a8fe6fb1868e5e19ba4e89e7b8caa37cc92c
drm/amdgpu/mes: Add cleaner shader fence address handling in MES for GFX11

This commit introduces enhancements to the handling of the cleaner
shader fence in the AMDGPU MES driver:

- The MES (Microcode Execution Scheduler) now sends a PM4 packet to the
  KIQ (Kernel Interface Queue) to request the cleaner shader, ensuring
  that requests are handled in a controlled manner and avoiding the
  race conditions.
- The CP (Compute Processor) firmware has been updated to use a private
  bus for accessing specific registers, avoiding unnecessary operations
  that could lead to issues in VF (Virtual Function) mode.
- The cleaner shader fence memory address is now set correctly in the
  `mes_set_hw_res_pkt` structure, allowing for proper synchronization of
  the cleaner shader execution.

Cc: lin cao <lin.cao@amd.com>
Cc: Jingwen Chen <Jingwen.Chen2@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Suggested-by: Shaoyun Liu <shaoyun.liu@amd.com>
Reviewed by: Shaoyun.liu  <Shaoyun.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c