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www.infradead.org Git - users/jedix/linux-maple.git/commit
drm/amd/display: Hardcode 45W Bounding Box for DCN2.1 Diags
[WHY]
Currently construction of clock limits gets skipped for diags.
This logic would be useful to get tested in diags.
[HOW]
Copy existing states to clk_table such that update_bw_bounding_box
logic gets used to fill the table.
Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>