]> www.infradead.org Git - users/dwmw2/linux.git/commit
riscv: Add Zawrs support for spinlocks
authorChristoph Müllner <christoph.muellner@vrull.eu>
Fri, 26 Apr 2024 10:08:23 +0000 (12:08 +0200)
committerPalmer Dabbelt <palmer@rivosinc.com>
Fri, 12 Jul 2024 10:16:42 +0000 (03:16 -0700)
commitb8ddb0df30f9f6e70422f1e705b7416da115bd24
treeebea527aaf0c67a505789c0c7ff7b80f5e68a027
parent6d5852811600086f0a227a4d646b2a20b4dfe533
riscv: Add Zawrs support for spinlocks

RISC-V code uses the generic ticket lock implementation, which calls
the macros smp_cond_load_relaxed() and smp_cond_load_acquire().
Introduce a RISC-V specific implementation of smp_cond_load_relaxed()
which applies WRS.NTO of the Zawrs extension in order to reduce power
consumption while waiting and allows hypervisors to enable guests to
trap while waiting. smp_cond_load_acquire() doesn't need a RISC-V
specific implementation as the generic implementation is based on
smp_cond_load_relaxed() and smp_acquire__after_ctrl_dep() sufficiently
provides the acquire semantics.

This implementation is heavily based on Arm's approach which is the
approach Andrea Parri also suggested.

The Zawrs specification can be found here:
https://github.com/riscv/riscv-zawrs/blob/main/zawrs.adoc

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Co-developed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20240426100820.14762-11-ajones@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/Kconfig
arch/riscv/include/asm/barrier.h
arch/riscv/include/asm/cmpxchg.h
arch/riscv/include/asm/hwcap.h
arch/riscv/include/asm/insn-def.h
arch/riscv/kernel/cpufeature.c