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scsi: aacraid: Insure we don't access PCIe space during AER/EEH
authorDave Carroll <david.carroll@microsemi.com>
Fri, 22 Mar 2019 18:16:03 +0000 (12:16 -0600)
committerMartin K. Petersen <martin.petersen@oracle.com>
Tue, 26 Mar 2019 02:19:01 +0000 (22:19 -0400)
commitb6554cfe09e1f610aed7d57164ab7760be57acd9
treef55eeb54f1b6b926bfaab5eb9c7e8f2f7ab814fftree
parentc2fe742ff6e77c5b4fe4ad273191ddf28fdea25ecommit | diff
scsi: aacraid: Insure we don't access PCIe space during AER/EEH

There are a few windows during AER/EEH when we can access PCIe I/O mapped
registers. This will harden the access to insure we do not allow PCIe
access during errors

Signed-off-by: Dave Carroll <david.carroll@microsemi.com>
Reviewed-by: Sagar Biradar <sagar.biradar@microchip.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/scsi/aacraid/aacraid.h diff | blob | history
drivers/scsi/aacraid/commsup.c diff | blob | history
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