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drm/i915/adlp+/dp_mst: Align master transcoder disabling with spec wrt. DP2 config
authorImre Deak <imre.deak@intel.com>
Wed, 30 Oct 2024 19:23:13 +0000 (21:23 +0200)
committerImre Deak <imre.deak@intel.com>
Wed, 6 Nov 2024 16:13:40 +0000 (18:13 +0200)
commitb63937da16d332fb805f9dcde8b57ea2a767f18e
tree5eb6442028137937eb53fb879e9bf100ce5310b0tree
parent90477f0dfd8881d2336ed3c7fd166bdc4c924e05commit | diff
drm/i915/adlp+/dp_mst: Align master transcoder disabling with spec wrt. DP2 config

On ADLP+ during modeset disabling, disable the DP2 configuration for MST
master transcoders as required by the specification.

Bspec: 55424, 54128, 65448, 68849
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241030192313.4030617-6-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c diff | blob | history
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