]> www.infradead.org Git - users/dwmw2/qemu.git/commit
target/i386: Walk NPT in guest real mode
authorAlexander Graf <graf@amazon.com>
Sat, 21 Sep 2024 08:57:12 +0000 (08:57 +0000)
committerRichard Henderson <richard.henderson@linaro.org>
Tue, 22 Oct 2024 20:45:03 +0000 (13:45 -0700)
commitb56617bbcb473c25815d1bf475e326f84563b1de
treecb80f0bbb5f0c6c3066bd98465e8ad1f40f5d77a
parent4a75c8c7d6d1a965a1ef0a8067d0af9364edb800
target/i386: Walk NPT in guest real mode

When translating virtual to physical address with a guest CPU that
supports nested paging (NPT), we need to perform every page table walk
access indirectly through the NPT, which we correctly do.

However, we treat real mode (no page table walk) special: In that case,
we currently just skip any walks and translate VA -> PA. With NPT
enabled, we also need to then perform NPT walk to do GVA -> GPA -> HPA
which we fail to do so far.

The net result of that is that TCG VMs with NPT enabled that execute
real mode code (like SeaBIOS) end up with GPA==HPA mappings which means
the guest accesses host code and data. This typically shows as failure
to boot guests.

This patch changes the page walk logic for NPT enabled guests so that we
always perform a GVA -> GPA translation and then skip any logic that
requires an actual PTE.

That way, all remaining logic to walk the NPT stays and we successfully
walk the NPT in real mode.

Cc: qemu-stable@nongnu.org
Fixes: fe441054bb3f0 ("target-i386: Add NPT support")
Signed-off-by: Alexander Graf <graf@amazon.com>
Reported-by: Eduard Vlad <evlad@amazon.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20240921085712.28902-1-graf@amazon.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
target/i386/tcg/sysemu/excp_helper.c