Add some of the SoC's CPU peripherals currently supported:
- GPIO controller with support for 24 GPIO lines, although not all
lines are brought out to pads on the SoC package. These lines can
generate interrupts from external sources.
- Watchdog which can be used to restart the SoC if no external restart
logic is present.
- SPI controller, primarily used to access NOR flash
Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>