]> www.infradead.org Git - nvme.git/commit
octeontx2-af: Fix CPT AF register offset calculation
authorBharat Bhushan <bbhushan2@marvell.com>
Wed, 21 Aug 2024 07:05:58 +0000 (12:35 +0530)
committerPaolo Abeni <pabeni@redhat.com>
Thu, 22 Aug 2024 11:14:46 +0000 (13:14 +0200)
commitaf688a99eb1fc7ef69774665d61e6be51cea627a
tree3a649a14b3819c97a8b3de49815dac5665cc4116
parenta2f5c505b4378cd6fc7c4a44ff3665ccef2037db
octeontx2-af: Fix CPT AF register offset calculation

Some CPT AF registers are per LF and others are global. Translation
of PF/VF local LF slot number to actual LF slot number is required
only for accessing perf LF registers. CPT AF global registers access
do not require any LF slot number. Also, there is no reason CPT
PF/VF to know actual lf's register offset.

Without this fix microcode loading will fail, VFs cannot be created
and hardware is not usable.

Fixes: bc35e28af789 ("octeontx2-af: replace cpt slot with lf id on reg write")
Signed-off-by: Bharat Bhushan <bbhushan2@marvell.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/20240821070558.1020101-1-bbhushan2@marvell.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c