]> www.infradead.org Git - users/jedix/linux-maple.git/commit
PCI: dw-rockchip: Reorganize register and bitfield definitions
authorHans Zhang <18255117159@163.com>
Sun, 27 Apr 2025 12:53:15 +0000 (20:53 +0800)
committerManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Sun, 27 Apr 2025 14:10:33 +0000 (19:40 +0530)
commitae8ed2b091ee8bd92da365d3332eebf159de8e0f
treed871f20e25393c533523cca6fbd3ae81364fa7af
parentc2f61b8479b2abcd9e20f8bd4c46e54bb7f5286f
PCI: dw-rockchip: Reorganize register and bitfield definitions

Register definitions were scattered with ambiguous names (e.g.,
PCIE_RDLH_LINK_UP_CHGED in PCIE_CLIENT_INTR_STATUS_MISC) and lacked
hierarchical grouping.

Group registers and their associated bitfields logically. This improves
maintainability and aligns the code with hardware documentation.

Signed-off-by: Hans Zhang <18255117159@163.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Niklas Cassel <cassel@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://patch.msgid.link/20250427125316.99627-3-18255117159@163.com
drivers/pci/controller/dwc/pcie-dw-rockchip.c