]> www.infradead.org Git - users/dwmw2/linux.git/commit
irqchip/riscv-intc: Fix SMP=n boot with ACPI
authorSunil V L <sunilvl@ventanamicro.com>
Mon, 14 Oct 2024 06:57:39 +0000 (12:27 +0530)
committerThomas Gleixner <tglx@linutronix.de>
Tue, 15 Oct 2024 21:14:25 +0000 (23:14 +0200)
commita98a0f050ced4bd4ecb59e92412916012b7c2917
tree22e46f831960eb94943e94c186fa307403802e12
parent6b1e0651e9ce8ce418ad4ff360e7b9925dc5da79
irqchip/riscv-intc: Fix SMP=n boot with ACPI

When CONFIG_SMP is disabled, the static array rintc_acpi_data with size
NR_CPUS is not sufficient to hold all RINTC structures passed from the
firmware.

All RINTC structures are required to configure IMSIC/APLIC/PLIC properly
irrespective of SMP in the OS. So, allocate dynamic memory based on the
number of RINTC structures in MADT to fix this issue.

Fixes: f8619b66bdb1 ("irqchip/riscv-intc: Add ACPI support for AIA")
Reported-by: Björn Töpel <bjorn@kernel.org>
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/all/20241014065739.656959-1-sunilvl@ventanamicro.com
Closes: https://github.com/linux-riscv/linux-riscv/actions/runs/11280997511/job/31375229012
drivers/irqchip/irq-riscv-intc.c