]> www.infradead.org Git - users/jedix/linux-maple.git/commit
arm64: optimize flush tlb kernel range
authorKefeng Wang <wangkefeng.wang@huawei.com>
Mon, 23 Sep 2024 13:13:51 +0000 (21:13 +0800)
committerCatalin Marinas <catalin.marinas@arm.com>
Wed, 16 Oct 2024 11:01:53 +0000 (12:01 +0100)
commita923705c69f7f4ebe6a5488c1f556bed12d28031
treec51eb05da42a4a0caceabf0c250a18f2e6c7e68f
parent7ffc13e233951f15728c9d09db3cc8d9f6cf81f2
arm64: optimize flush tlb kernel range

Currently the kernel TLBs is flushed page by page if the target
VA range is less than MAX_DVM_OPS * PAGE_SIZE, otherwise we'll
brutally issue a TLBI ALL.

But we could optimize it when CPU supports TLB range operations,
convert to use __flush_tlb_range_op() like other tlb range flush
to improve performance.

Co-developed-by: Yicong Yang <yangyicong@hisilicon.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20240923131351.713304-3-wangkefeng.wang@huawei.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/tlbflush.h