]> www.infradead.org Git - users/jedix/linux-maple.git/commit
tools/power turbostat: print IRTL MSRs
authorLen Brown <len.brown@intel.com>
Fri, 23 Dec 2016 21:28:24 +0000 (16:28 -0500)
committerDhaval Giani <dhaval.giani@oracle.com>
Mon, 16 Jan 2017 20:11:15 +0000 (15:11 -0500)
commita8eb5942459683145c3895e586afd68bebde1154
tree2fc7d07aa3a0900e9caf67c78ce5fe60afa0259d
parent2c6b278dd2418a07de88536bfcf5403b724d84be
tools/power turbostat: print IRTL MSRs

Orabug: 24811361

Some processors use the Interrupt Response Time Limit (IRTL) MSR value
to describe the maximum IRQ response time latency for deep
package C-states.  (Though others have the register, but do not use it)
Lets print it out to give insight into the cases where it is used.

IRTL begain in SNB, with PC3/PC6/PC7, and HSW added PC8/PC9/PC10.

Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 5a63426e2a18775ed05b20e3bc90c68bacb1f68a)
Signed-off-by: Brian Maly <brian.maly@oracle.com>
Signed-off-by: Dhaval Giani <dhaval.giani@oracle.com>
tools/power/x86/turbostat/turbostat.c