]> www.infradead.org Git - users/jedix/linux-maple.git/commit
dt-bindings: PCI: socionext,uniphier-pcie-ep: Add top-level constraints
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Sun, 18 Aug 2024 17:28:43 +0000 (19:28 +0200)
committerKrzysztof Wilczyński <kwilczynski@kernel.org>
Wed, 4 Sep 2024 14:32:34 +0000 (14:32 +0000)
commita5c1bf7e9a4638fbb27461e9801f07204b50dcb6
tree070abd3e6d11e356630d4b0256c96b6bb227c83f
parentc62a0b8fe8bfbaa78efe5de7b30a9d0d225be1ab
dt-bindings: PCI: socionext,uniphier-pcie-ep: Add top-level constraints

Properties with variable number of items per each device are expected to
have widest constraints in top-level "properties:" block and further
customized (narrowed) in "if:then:".

Add missing top-level constraints for clock-names and reset-names.

Link: https://lore.kernel.org/linux-pci/20240818172843.121787-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml