]> www.infradead.org Git - users/dwmw2/linux.git/commit
drm/bridge: tc358768: Attempt to fix DSI horizontal timings
authorTomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Wed, 6 Sep 2023 06:50:59 +0000 (09:50 +0300)
committerRobert Foss <rfoss@kernel.org>
Wed, 20 Sep 2023 11:54:08 +0000 (13:54 +0200)
commit9fc75c40faa29df14ba16066be6bdfaea9f39ce4
tree7d1f51d7ec4e5031e39b7f08a32f26e45247ba90
parentf1dabbe645065d20ca863c8d446c74c59ca1ca9d
drm/bridge: tc358768: Attempt to fix DSI horizontal timings

The DSI horizontal timing calculations done by the driver seem to often
lead to underflows or overflows, depending on the videomode.

There are two main things the current driver doesn't seem to get right:
DSI HSW and HFP, and VSDly. However, even following Toshiba's
documentation it seems we don't always get a working display.

This patch attempts to fix the horizontal timings for DSI event mode, and
on a system with a DSI->HDMI encoder, a lot of standard HDMI modes now
seem to work. The work relies on Toshiba's documentation, but also quite
a bit on empirical testing.

This also adds timing related debug prints to make it easier to improve
on this later.

The DSI pulse mode has only been tested with a fixed-resolution panel,
which limits the testing of different modes on DSI pulse mode. However,
as the VSDly calculation also affects pulse mode, so this might cause a
regression.

Reviewed-by: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-by: Maxim Schwalm <maxim.schwalm@gmail.com> # Asus TF700T
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Signed-off-by: Robert Foss <rfoss@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230906-tc358768-v4-12-31725f008a50@ideasonboard.com
drivers/gpu/drm/bridge/tc358768.c