]> www.infradead.org Git - users/jedix/linux-maple.git/commit
net: dsa: vsc73xx: allow phy resetting
authorPawel Dembicki <paweldembicki@gmail.com>
Fri, 9 Aug 2024 19:38:05 +0000 (21:38 +0200)
committerDavid S. Miller <davem@davemloft.net>
Mon, 12 Aug 2024 10:46:55 +0000 (11:46 +0100)
commit9f9a72654622bae75adb1e1923d709e96ede3042
tree4441f25535b9beeec11ba06b465d573894d493a2
parentfa63c6434b6f6aaf9d8d599dc899bc0a074cc0ad
net: dsa: vsc73xx: allow phy resetting

Resetting the VSC73xx PHY was problematic because the MDIO bus, without
a busy check, read and wrote incorrect register values.

My investigation indicates that resetting the PHY only triggers changes
in configuration. However, improper register values written earlier
were only exposed after a soft reset.

The reset itself wasn't the issue; rather, the problem stemmed from
incorrect read and write operations.

A 'soft_reset' can now proceed normally. There are no reasons to keep
the VSC73xx from being reset.

This commit removes the reset blockade in the 'vsc73xx_phy_write'
function.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/dsa/vitesse-vsc73xx-core.c