]> www.infradead.org Git - nvme.git/commit
drm/msm/a6xx+: Don't let IB_SIZE overflow
authorRob Clark <robdclark@chromium.org>
Mon, 17 Mar 2025 15:00:06 +0000 (08:00 -0700)
committerRob Clark <robdclark@chromium.org>
Fri, 18 Apr 2025 22:15:24 +0000 (15:15 -0700)
commit9d78f02503227d3554d26cf8ca73276105c98f3e
treea58649aa46cff7b87318146a9088fc9703195be0
parentddfa00afae800b3dea02fa36f3f4012a8379ae58
drm/msm/a6xx+: Don't let IB_SIZE overflow

IB_SIZE is only b0..b19.  Starting with a6xx gen3, additional fields
were added above the IB_SIZE.  Accidentially setting them can cause
badness.  Fix this by properly defining the CP_INDIRECT_BUFFER packet
and using the generated builder macro to ensure unintended bits are not
set.

v2: add missing type attribute for IB_BASE
v3: fix offset attribute in xml

Reported-by: Connor Abbott <cwabbott0@gmail.com>
Fixes: a83366ef19ea ("drm/msm/a6xx: add A640/A650 to gpulist")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/643396/
drivers/gpu/drm/msm/adreno/a6xx_gpu.c
drivers/gpu/drm/msm/registers/adreno/adreno_pm4.xml