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drm/amdgpu: Program GC registers through RLCG interface in gfx_v11/gmc_v11
authorYifan Zha <Yifan.Zha@amd.com>
Wed, 7 Sep 2022 06:13:02 +0000 (14:13 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 19 Oct 2022 02:13:24 +0000 (22:13 -0400)
commit97a3d6090f5c2a165dc88bda05c1dcf9f08bf886
treec2cbf6f3dd80c28263d8faa8fdfddb9c094ff8cftree
parente688ba3e276422aa88eae7a54186a95320836081commit | diff
drm/amdgpu: Program GC registers through RLCG interface in gfx_v11/gmc_v11

[Why]
L1 blocks most of GC registers accessing by MMIO.

[How]
Use RLCG interface to program GC registers under SRIOV VF in full access time.

Signed-off-by: Yifan Zha <Yifan.Zha@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c diff | blob | history
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c diff | blob | history
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c diff | blob | history
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