sparc64: Fix a race condition when stopping performance counters

sparc64: Fix a race condition when stopping performance counters

When stopping a performance counter that is close to overflowing,
there is a race condition that can occur between writing to the
PCRx register to stop the counter (and also clearing the PCRx.ov
bit at the same time) vs the performance counter overflowing and
setting the PCRx.ov bit in the PCRx register.
The result of this race condition is that we occassionally miss
a performance counter overflow interrupt, which in turn leads
to incorrect event counting.
This race condition has been observed when counting cpu cycles.
To fix this issue when stopping a performance counter,
we simply allow it to continue counting and overflow before
stopping it. This allows the performance counter overflow
interrupt to be generated and acted upon.
This fix is applied for M7, T5 and T4 devices.

Note: This commit is based on the following commits:
8b9b5b404e754e5c271341f5d7ea4797374c9844
a2d17bc33bdcc1cefd84bca44f2fd27075b16058
960f1607bec735e8da7dbd5df818da0a2e2b0305

Orabug: 22876587

Signed-off-by: Dave Aldridge <david.j.aldridge@oracle.com>
Signed-off-by: Eric Saint-Etienne <eric.saint.etienne@oracle.com>
(cherry picked from commit e5b7619e1de2f3e0dd858f632bc08ce64c344245)
Signed-off-by: Allen Pais <allen.pais@oracle.com>