x86, MCE, AMD: Make APIC LVT thresholding interrupt optional

x86, MCE, AMD: Make APIC LVT thresholding interrupt optional

Currently, the APIC LVT interrupt for error thresholding is implicitly
enabled. However, there are models in the F15h range which do not enable
it. Make the code machinery which sets up the APIC interrupt support
an optional setting and add an ->interrupt_capable member to the bank
representation mirroring that capability and enable the interrupt offset
programming only if it is true.

Simplify code and fixup comment style while at it.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Conflicts:

	arch/x86/kernel/cpu/mcheck/mce_amd.c