]> www.infradead.org Git - users/jedix/linux-maple.git/commit
drm/i915/dsi: fix DSS CTL register offsets for TGL+
authorJani Nikula <jani.nikula@intel.com>
Wed, 1 Mar 2023 15:14:09 +0000 (17:14 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 20 Apr 2023 10:35:07 +0000 (12:35 +0200)
commit8d901a336302324742bd800f8402d3c0e781c8ff
treeddeec9f0dfbf02648ea612092154c6d84e7daf52
parentb15df140fe092c3ac28dab32c6b3acdda1a93c63
drm/i915/dsi: fix DSS CTL register offsets for TGL+

commit 6b8446859c971a5783a2cdc90adf32e64de3bd23 upstream.

On TGL+ the DSS control registers are at different offsets, and there's
one per pipe. Fix the offsets to fix dual link DSI for TGL+.

There would be helpers for this in the DSC code, but just do the quick
fix now for DSI. Long term, we should probably move all the DSS handling
into intel_vdsc.c, so exporting the helpers seems counter-productive.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8232
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230301151409.1581574-1-jani.nikula@intel.com
(cherry picked from commit 1a62dd9895dca78bee28bba3a36f08836fdd143d)
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/i915/display/icl_dsi.c