]> www.infradead.org Git - users/dwmw2/qemu.git/commit
target/i386/tcg: use X86Access for TSS access
authorPaolo Bonzini <pbonzini@redhat.com>
Tue, 18 Jun 2024 07:13:49 +0000 (09:13 +0200)
committerPaolo Bonzini <pbonzini@redhat.com>
Tue, 16 Jul 2024 16:18:25 +0000 (18:18 +0200)
commit8b131065080af3cf2dda04e4e190c5a74fec2f31
treeeb484586b33774572eddbfe123be2988e565a054
parent05d41bbcb34ee30465517229a888da93666b4f3f
target/i386/tcg: use X86Access for TSS access

This takes care of probing the vaddr range in advance, and is also faster
because it avoids repeated TLB lookups.  It also matches the Intel manual
better, as it says "Checks that the current (old) TSS, new TSS, and all
segment descriptors used in the task switch are paged into system memory";
note however that it's not clear how the processor checks for segment
descriptors, and this check is not included in the AMD manual.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
target/i386/tcg/seg_helper.c