]> www.infradead.org Git - users/willy/xarray.git/commit
net/mlx5e: SHAMPO, Simplify UMR allocation for headers
authorDragos Tatulea <dtatulea@nvidia.com>
Thu, 7 Nov 2024 19:43:53 +0000 (21:43 +0200)
committerJakub Kicinski <kuba@kernel.org>
Tue, 12 Nov 2024 03:28:18 +0000 (19:28 -0800)
commit8a0ee54027b1fbccda3f2683dafec9b7216993a4
tree86d0f79251b5ddc0302287e00d53a3117260d66c
parentbe034baba83e2a80a0b2c0f24c08547b6eedc79a
net/mlx5e: SHAMPO, Simplify UMR allocation for headers

Allocating page fragments for header data split is currently
more complicated than it should be. That's because the number
of KSM entries allocated is not aligned to the number of headers
per page. This leads to having leftovers in the next allocation
which require additional accounting and needlessly complicated
code.

This patch aligns (down) the number of KSM entries in the
UMR WQE to the number of headers per page by:

1) Aligning the max number of entries allocated per UMR WQE
   (max_ksm_entries) to MLX5E_SHAMPO_WQ_HEADER_PER_PAGE.

2) Aligning the total number of free headers to
   MLX5E_SHAMPO_WQ_HEADER_PER_PAGE.

... and then it drops the extra accounting code from
mlx5e_build_shampo_hd_umr().

Although the number of entries allocated per UMR WQE is slightly
smaller due to aligning down, no performance impact was observed.

Signed-off-by: Dragos Tatulea <dtatulea@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20241107194357.683732-9-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/mellanox/mlx5/core/en.h
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c