]> www.infradead.org Git - users/jedix/linux-maple.git/commit
can: flexcan: add NXP S32G2/S32G3 SoC support
authorCiprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Mon, 13 Jan 2025 12:07:04 +0000 (14:07 +0200)
committerMarc Kleine-Budde <mkl@pengutronix.de>
Wed, 19 Feb 2025 10:09:07 +0000 (11:09 +0100)
commit8503a4b1a24d32e95f3a233062e8f1dc0b2052bd
tree7038027d4999fdcb8926dace584eb072b3695440
parent8c652cf030a769fbfc73cfc280ed3f1656343c35
can: flexcan: add NXP S32G2/S32G3 SoC support

Add device type data for S32G2/S32G3 SoC.

FlexCAN module from S32G2/S32G3 is similar with i.MX SoCs, but interrupt
management is different.

On S32G2/S32G3 SoC, there are separate interrupts for state change, bus
errors, Mailboxes 0-7 and Mailboxes 8-127 respectively.
In order to handle this FlexCAN hardware particularity, first reuse the
'FLEXCAN_QUIRK_NR_IRQ_3' quirk provided by mcf5441x's irq handling
support. Secondly, use the newly introduced
'FLEXCAN_QUIRK_SECONDARY_MB_IRQ' quirk which handles the case where two
separate mailbox ranges are controlled by independent hardware interrupt
lines.

Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Link: https://patch.msgid.link/20250113120704.522307-4-ciprianmarian.costea@oss.nxp.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
drivers/net/can/flexcan/flexcan-core.c