]> www.infradead.org Git - nvme.git/commit
arm64: dts: marvell: cn9130-sr-som: fix cp0 mdio pin numbers
authorJosua Mayer <josua@solid-run.com>
Wed, 2 Oct 2024 13:07:16 +0000 (15:07 +0200)
committerGregory CLEMENT <gregory.clement@bootlin.com>
Mon, 7 Oct 2024 08:05:35 +0000 (10:05 +0200)
commit841dd5b122b4b8080ede69c5f72fd6057da43f8a
tree329c0054242d2fa8344f6c7c27f773bc05f89469
parent9852d85ec9d492ebef56dc5f229416c925758edc
arm64: dts: marvell: cn9130-sr-som: fix cp0 mdio pin numbers

SolidRun CN9130 SoM actually uses CP_MPP[0:1] for mdio. CP_MPP[40]
provides reference clock for dsa switch and ethernet phy on Clearfog
Pro, wheras MPP[41] controls efuse programming voltage "VHV".

Update the cp0 mdio pinctrl node to specify mpp0, mpp1.

Fixes: 1c510c7d82e5 ("arm64: dts: add description for solidrun cn9130 som and clearfog boards")
Cc: stable@vger.kernel.org # 6.11.x
Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/stable/20241002-cn9130-som-mdio-v1-1-0942be4dc550%40solid-run.com
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi