]> www.infradead.org Git - users/jedix/linux-maple.git/commit
iommu/amd: Disable AMD IOMMU if CMPXCHG16B feature is not supported
authorSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Mon, 18 Nov 2024 05:49:30 +0000 (05:49 +0000)
committerJoerg Roedel <jroedel@suse.de>
Wed, 18 Dec 2024 08:37:38 +0000 (09:37 +0100)
commit82582f85ed22ba6cd27fea76b4248745f3b9fdf7
tree68b7de50af7d4e77aa4901731aae3441f4cffd46
parentf20a6e3eb2ef323aa0a6ac22f94293ce4f17d113
iommu/amd: Disable AMD IOMMU if CMPXCHG16B feature is not supported

According to the AMD IOMMU spec, IOMMU hardware reads the entire DTE
in a single 256-bit transaction. It is recommended to update DTE using
128-bit operation followed by an INVALIDATE_DEVTAB_ENTYRY command when
the IV=1b or V=1b before the change.

According to the AMD BIOS and Kernel Developer's Guide (BDKG) dated back
to family 10h Processor [1], which is the first introduction of AMD IOMMU,
AMD processor always has CPUID Fn0000_0001_ECX[CMPXCHG16B]=1.
Therefore, it is safe to assume cmpxchg128 is available with all AMD
processor w/ IOMMU.

In addition, the CMPXCHG16B feature has already been checked separately
before enabling the GA, XT, and GAM modes. Consolidate the detection logic,
and fail the IOMMU initialization if the feature is not supported.

[1] https://www.amd.com/content/dam/amd/en/documents/archived-tech-docs/programmer-references/31116.pdf

Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Suggested-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Link: https://lore.kernel.org/r/20241118054937.5203-3-suravee.suthikulpanit@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
drivers/iommu/amd/init.c