]> www.infradead.org Git - users/willy/pagecache.git/commit
perf/x86/intel: Fix event constraints for LNC
authorKan Liang <kan.liang@linux.intel.com>
Wed, 19 Feb 2025 14:10:05 +0000 (06:10 -0800)
committerPeter Zijlstra <peterz@infradead.org>
Thu, 20 Feb 2025 15:07:10 +0000 (16:07 +0100)
commit782cffeec9ad96daa64ffb2d527b2a052fb02552
tree81def019d2d72c0c94c40c26af6397529c7a73e0
parentec5fd50aeff9c9156304853c6d75eda852d4a2c8
perf/x86/intel: Fix event constraints for LNC

According to the latest event list, update the event constraint tables
for Lion Cove core.

The general rule (the event codes < 0x90 are restricted to counters
0-3.) has been removed. There is no restriction for most of the
performance monitoring events.

Fixes: a932aa0e868f ("perf/x86: Add Lunar Lake and Arrow Lake support")
Reported-by: Amiri Khalil <amiri.khalil@intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20250219141005.2446823-1-kan.liang@linux.intel.com
arch/x86/events/intel/core.c
arch/x86/events/intel/ds.c