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perf: CXL: fix mismatched number of counters mask
authorJeongtae Park <jtp.park@samsung.com>
Tue, 5 Sep 2023 12:33:09 +0000 (21:33 +0900)
committerWill Deacon <will@kernel.org>
Tue, 5 Sep 2023 14:51:18 +0000 (15:51 +0100)
commit7625df9f4b255eb9d56885e25c564d7e794c6da1
tree5f794f0b6732a78ea064fd70972a64e0e123c57ftree
parente1df27213941725962f68c64349bbcc60ece0314commit | diff
perf: CXL: fix mismatched number of counters mask

The number of Count Units field is described as 6 bits long
in the CXL 3.0 specification. However, its mask value was
only declared as 5 bits long.

Signed-off-by: Jeongtae Park <jtp.park@samsung.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20230905123309.775854-1-jtp.park@samsung.com
Signed-off-by: Will Deacon <will@kernel.org>
drivers/perf/cxl_pmu.c diff | blob | history
XArray, radix tree and IDR