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drm/i915/dmc_wl: Track INITIATE_PM_DMD_REQ for DC5
authorGustavo Sousa <gustavo.sousa@intel.com>
Mon, 3 Feb 2025 20:58:58 +0000 (17:58 -0300)
committerGustavo Sousa <gustavo.sousa@intel.com>
Tue, 4 Feb 2025 11:43:12 +0000 (08:43 -0300)
commit71be802005074a4cc2297e4a1da1ca268d9c6b49
tree6297f589b4a775bf7cdf830bfbbac807d50c7d0ftree
parent67782bf6e8a6289996bbc3ce7138c30ff72ee458commit | diff
drm/i915/dmc_wl: Track INITIATE_PM_DMD_REQ for DC5

The Bspec has been updated to include INITIATE_PM_DMD_REQ in the set of
register offsets that require the DMC wakelock for access during DC5.
Update our table accordingly.

Bspec: 71583
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250203205941.251754-1-gustavo.sousa@intel.com
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
drivers/gpu/drm/i915/display/intel_dmc_wl.c diff | blob | history
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