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xtensa: add missing isync to the cpu_reset TLB code
authorMax Filippov <jcmvbkbc@gmail.com>
Mon, 12 Aug 2019 22:01:30 +0000 (15:01 -0700)
committerSasha Levin <sashal@kernel.org>
Sun, 25 Aug 2019 14:10:22 +0000 (10:10 -0400)
commit6a7307fb161eb6f59b61c29cdb5285179cd00c8d
tree09dfcc2ee65cd342817da740980a0ce6a93a0625tree
parent31c6c99c12ff66d7ebf9475ada2f62bd5aa0d899commit | diff
xtensa: add missing isync to the cpu_reset TLB code

commit cd8869f4cb257f22b89495ca40f5281e58ba359c upstream.

ITLB entry modifications must be followed by the isync instruction
before the new entries are possibly used. cpu_reset lacks one isync
between ITLB way 6 initialization and jump to the identity mapping.
Add missing isync to xtensa cpu_reset.

Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/xtensa/kernel/setup.c diff | blob | history
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