]> www.infradead.org Git - users/jedix/linux-maple.git/commit
dt-bindings: clock: versaclock3: Document 5L35023 Versa3 clock generator
authorClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Tue, 10 Dec 2024 17:09:31 +0000 (19:09 +0200)
committerStephen Boyd <sboyd@kernel.org>
Tue, 10 Dec 2024 22:49:27 +0000 (14:49 -0800)
commit626b77735a3712b02dabb25be3a0abdde6696bf3
treebc0af5c8b683cc9e8b919a27bda6b80a3632fb9b
parentae6040cd7c7f8e80deefe5a49691734480f97409
dt-bindings: clock: versaclock3: Document 5L35023 Versa3 clock generator

There are some differences b/w 5L35023 and 5P35023 Versa3 clock
generator variants but the same driver could be used with minimal
adjustments. The identified differences are PLL2 Fvco, the clock sel
bit for SE2 clock and different default values for some registers.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/r/20241210170953.2936724-3-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Documentation/devicetree/bindings/clock/renesas,5p35023.yaml