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drm/i915/gt: replace cache_clflush_range
authorMichael Cheng <michael.cheng@intel.com>
Mon, 21 Mar 2022 22:38:19 +0000 (15:38 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Tue, 22 Mar 2022 17:10:53 +0000 (10:10 -0700)
commit61c5ed946da28e45edc3470e8d9f4da19cb15c8d
tree0b587d7d405c8c84add1535d33a3e1ba3cd8e96etree
parent89754df82f1565f2223293c0a0062b779a33d136commit | diff
drm/i915/gt: replace cache_clflush_range

Replace all occurrence of cache_clflush_range with drm_clflush_virt_range.
This will prevent compile errors on non-x86 platforms.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220321223819.72833-6-michael.cheng@intel.com
drivers/gpu/drm/i915/gt/gen8_ppgtt.c diff | blob | history
drivers/gpu/drm/i915/gt/intel_execlists_submission.c diff | blob | history
drivers/gpu/drm/i915/gt/intel_gtt.c diff | blob | history
drivers/gpu/drm/i915/gt/intel_ppgtt.c diff | blob | history
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c diff | blob | history
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