]> www.infradead.org Git - users/jedix/linux-maple.git/commit
riscv: Add support for per-thread envcfg CSR values
authorSamuel Holland <samuel.holland@sifive.com>
Wed, 14 Aug 2024 08:10:55 +0000 (01:10 -0700)
committerPalmer Dabbelt <palmer@rivosinc.com>
Sat, 5 Oct 2024 15:51:14 +0000 (08:51 -0700)
commit5fc7355f01376e69964bb21b685025b042c37acc
treef29389431b1104aa1d951fbf0312c0fc4604f306
parent1b57747e978f920fb2affd1952ed913276019115
riscv: Add support for per-thread envcfg CSR values

Some bits in the [ms]envcfg CSR, such as the CFI state and pointer
masking mode, need to be controlled on a per-thread basis. Support this
by keeping a copy of the CSR value in struct thread_struct and writing
it during context switches. It is safe to discard the old CSR value
during the context switch because the CSR is modified only by software,
so the CSR will remain in sync with the copy in thread_struct.

Use ALTERNATIVE directly instead of riscv_has_extension_unlikely() to
minimize branchiness in the context switching code.

Since thread_struct is copied during fork(), setting the value for the
init task sets the default value for all other threads.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Deepak Gupta <debug@rivosinc.com>
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Link: https://lore.kernel.org/r/20240814081126.956287-3-samuel.holland@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/processor.h
arch/riscv/include/asm/switch_to.h
arch/riscv/kernel/cpufeature.c