]> www.infradead.org Git - users/jedix/linux-maple.git/commit
dt-bindings: clk: vc5: Make SD/OE pin configuration properties not required
authorGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 11 Jan 2023 15:55:17 +0000 (16:55 +0100)
committerRob Herring (Arm) <robh@kernel.org>
Fri, 13 Sep 2024 19:50:48 +0000 (14:50 -0500)
commit5f949556ed38bfa3d89dfe46a18accf52b04fa42
tree430631544f09c1707a410c9cb0657f8e9d2eb2df
parent6417edb5d185917c4d7f72b81a4b6ebda26f7856
dt-bindings: clk: vc5: Make SD/OE pin configuration properties not required

"make dtbs_check":

    arch/arm64/boot/dts/renesas/r8a77951-salvator-xs.dtb: clock-generator@6a: 'idt,shutdown' is a required property
    From schema: Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
    arch/arm64/boot/dts/renesas/r8a77951-salvator-xs.dtb: clock-generator@6a: 'idt,output-enable-active' is a required property
    From schema: Documentation/devicetree/bindings/clock/idt,versaclock5.yaml

Versaclock 5 clock generators can have their configuration stored in
One-Time Programmable (OTP) memory.  Hence there is no need to specify
DT properties for manual configuration if the OTP has been programmed
before.  Likewise, the Linux driver does not touch the SD/OE bits if the
corresponding properties are not specified, cfr. commit d83e561d43bc71e5
("clk: vc5: Add properties for configuring SD/OE behavior").

Reflect this in the bindings by making the "idt,shutdown" and
"idt,output-enable-active" properties not required, just like the
various "idt,*" properties in the per-output child nodes.

Fixes: 275e4e2dc0411508 ("dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Link: https://lore.kernel.org/r/68037ad181991fe0b792f6d003e3e9e538d5ffd7.1673452118.git.geert+renesas@glider.be
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Documentation/devicetree/bindings/clock/idt,versaclock5.yaml