]> www.infradead.org Git - users/jedix/linux-maple.git/commit
arm64: dts: rockchip: Disable DMA for uart5 on px30-ringneck
authorLukasz Czechowski <lukasz.czechowski@thaumatec.com>
Tue, 21 Jan 2025 12:56:04 +0000 (13:56 +0100)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 3 Feb 2025 08:59:20 +0000 (09:59 +0100)
commit5ae4dca718eacd0a56173a687a3736eb7e627c77
tree0ee5507faf2864ca09b0822f4d846147ec8aecb3
parent4eee627ea59304cdd66c5d4194ef13486a6c44fc
arm64: dts: rockchip: Disable DMA for uart5 on px30-ringneck

UART controllers without flow control seem to behave unstable
in case DMA is enabled. The issues were indicated in the message:
https://lore.kernel.org/linux-arm-kernel/CAMdYzYpXtMocCtCpZLU_xuWmOp2Ja_v0Aj0e6YFNRA-yV7u14g@mail.gmail.com/
In case of PX30-uQ7 Ringneck SoM, it was noticed that after couple
of hours of UART communication, the CPU stall was occurring,
leading to the system becoming unresponsive.
After disabling the DMA, extensive UART communication tests for
up to two weeks were performed, and no issues were further
observed.
The flow control pins for uart5 are not available on PX30-uQ7
Ringneck, as configured by pinctrl-0, so the DMA nodes were
removed on SoM dtsi.

Cc: stable@vger.kernel.org
Fixes: c484cf93f61b ("arm64: dts: rockchip: add PX30-µQ7 (Ringneck) SoM with Haikou baseboard")
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Link: https://lore.kernel.org/r/20250121125604.3115235-3-lukasz.czechowski@thaumatec.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi