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drm/amdgpu: Add JPEG4_0_3 core reset control reg
authorSathishkumar S <sathishkumar.sundararaju@amd.com>
Wed, 12 Feb 2025 04:51:40 +0000 (10:21 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 19 Feb 2025 20:16:04 +0000 (15:16 -0500)
commit58702e1a093b76cd273ec25b0cd0218d235743cd
treeaf9825c6a20e6d051500d3d2836041630e47e01atree
parentdc0297f3198bd60108ccbd167ee5d9fa4af31ed0commit | diff
drm/amdgpu: Add JPEG4_0_3 core reset control reg

Add core reset control registers for JPEG4_0_3

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_3_offset.h diff | blob | history
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