]> www.infradead.org Git - users/jedix/linux-maple.git/commit
pinctrl: renesas: rzg2l: Add support for RZ/V2N SoC
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tue, 15 Apr 2025 13:08:54 +0000 (14:08 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 5 May 2025 08:50:10 +0000 (10:50 +0200)
commit5488aa013e9ef17c4c7aa8c4e6166dd89c69c3c6
tree0859496c65b682424275f52f6516614e5b910535
parent0af2f6be1b4281385b618cb86ad946eded089ac8
pinctrl: renesas: rzg2l: Add support for RZ/V2N SoC

Add pinctrl support for the Renesas RZ/V2N SoC by reusing the existing
RZ/V2H(P) pin configuration data. The PFC block is nearly identical, with
the only difference being the absence of `PCIE1_RSTOUTB` on RZ/V2N.

To handle this, the rzv2h_dedicated_pins array is refactored into a common
and pcie1 subset. This enables reuse of the common portion across both
SoCs, while excluding PCIE1_RSTOUTB for RZ/V2N.

This change allows the pinctrl-rzg2l driver to support RZ/V2N without
duplicating large parts of the RZ/V2H configuration.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250415130854.242227-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/pinctrl/renesas/Kconfig
drivers/pinctrl/renesas/pinctrl-rzg2l.c