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riscv, bpf: Optimize sign-extention mov insns with Zbb support
authorPu Lehui <pulehui@huawei.com>
Mon, 15 Jan 2024 13:12:34 +0000 (13:12 +0000)
committerDaniel Borkmann <daniel@iogearbox.net>
Mon, 29 Jan 2024 15:25:33 +0000 (16:25 +0100)
commit519fb722bea09ae2664ad21f8ef4360fb799eb2f
treee20f5b0751cd2551f703834bd9be65633771a59ctree
parent647b93f65daa128d9a0e4aac744a5fcf5f58b2d2commit | diff
riscv, bpf: Optimize sign-extention mov insns with Zbb support

Add 8-bit and 16-bit sign-extention wraper with Zbb support to optimize
sign-extension mov instructions.

Signed-off-by: Pu Lehui <pulehui@huawei.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Tested-by: Björn Töpel <bjorn@rivosinc.com>
Acked-by: Björn Töpel <bjorn@kernel.org>
Link: https://lore.kernel.org/bpf/20240115131235.2914289-6-pulehui@huaweicloud.com
arch/riscv/net/bpf_jit.h diff | blob | history
arch/riscv/net/bpf_jit_comp64.c diff | blob | history
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