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KVM: arm64: nv: Honor MDCR_EL2.{TPM, TPMCR} in Host EL0
authorOliver Upton <oliver.upton@linux.dev>
Fri, 25 Oct 2024 18:23:44 +0000 (18:23 +0000)
committerOliver Upton <oliver.upton@linux.dev>
Thu, 31 Oct 2024 19:00:39 +0000 (19:00 +0000)
commit4ee5d5ff4b4dd0e08d0424aeec62f25d1d66bb04
tree093aeb4e973691475c0e43d92477a410397e68a8tree
parentd97e66fbcba796bb986e2097c352afae896b7942commit | diff
KVM: arm64: nv: Honor MDCR_EL2.{TPM, TPMCR} in Host EL0

TPM and TPMCR trap bits also affect Host EL0. How fun.

Mark these two trap bits as such and take advantage of the new
infrastructure for dealing w/ EL0 traps.

Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20241025182354.3364124-10-oliver.upton@linux.dev
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
arch/arm64/kvm/emulate-nested.c diff | blob | history
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