]> www.infradead.org Git - users/jedix/linux-maple.git/commit
drm/i915/gvt: parse init context to update cmd accessible reg whitelist
authorYan Zhao <yan.y.zhao@intel.com>
Wed, 23 Dec 2020 03:44:30 +0000 (11:44 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Fri, 25 Dec 2020 03:12:46 +0000 (11:12 +0800)
commit493f30cd086e5250e77f1ff201d22872a46e83e4
tree3d13085550f86e620db498c209cc14007eef8bdd
parentfe7bcfaeb2b775f257348dc7b935f8e80eef3e7d
drm/i915/gvt: parse init context to update cmd accessible reg whitelist

Logical Context is actually a big batch buffer consisting of multiple
LRI commands + saved registers. It comprises Ring Context (the first
0x50 dwords) and Engine Context. The registers defined in Engine Context
are command accessible, and safe to execute in VM Context.
However, not all of them are currently tracked in existing register
whitelist. Here we kick hardware to generate a dummy Engine Context and
then scan the dummy Engine context to update whitelist dynamically. Based
on updated list, later patches will audit future VM Engine Contexts to
disallow undesired LRIs (if out of what hardware generates).

Cc: Kevin Tian <kevin.tian@intel.com>
Signed-off-by: Wang Zhi <zhi.a.wang@intel.com>
Signed-off-by: Yan Zhao <yan.y.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20201223034430.16934-1-yan.y.zhao@intel.com
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/cmd_parser.c
drivers/gpu/drm/i915/gvt/cmd_parser.h
drivers/gpu/drm/i915/gvt/gvt.h
drivers/gpu/drm/i915/gvt/vgpu.c