]> www.infradead.org Git - users/dwmw2/qemu.git/commit
hw/timer/hpet: fix IRQ routing in legacy support mode
authorDavid Woodhouse <dwmw@amazon.co.uk>
Wed, 30 Aug 2023 20:13:57 +0000 (21:13 +0100)
committerDavid Woodhouse <dwmw@amazon.co.uk>
Fri, 26 Jan 2024 17:15:17 +0000 (17:15 +0000)
commit45258f81b17746eb0b598c840c0ee8be7609b6d7
tree644da0fcdc19926d9789a7fcd20d1626d58793ec
parentd152f6b286de09ccf15a2db4bb3684b38b9cb969
hw/timer/hpet: fix IRQ routing in legacy support mode

The interrupt from timer 0 in legacy mode is supposed to go to IRQ 0 on
the i8259 and IRQ 2 on the I/O APIC. The generic x86 GSI handling can't
cope with IRQ numbers differing between the two chips (despite it also
being the case for PCI INTx routing), so add a special case for the HPET.

IRQ 2 isn't valid on the i8259; it's the cascade IRQ and would be
interpreted as spurious interrupt on the secondary PIC. So we can fix
up all attempts to deliver IRQ2, to actually deliver to IRQ0 on the PIC.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
hw/i386/x86.c
hw/timer/hpet.c