]> www.infradead.org Git - users/jedix/linux-maple.git/commit
riscv: dts: sophgo: fix DMA data-width configuration for CV18xx
authorZe Huang <huangze@whut.edu.cn>
Mon, 28 Apr 2025 09:24:36 +0000 (17:24 +0800)
committerInochi Amaoto <inochiama@gmail.com>
Wed, 30 Apr 2025 06:51:43 +0000 (14:51 +0800)
commit3e6244429ba38f8dee3336b8b805948276b281ab
treedcc4be368fc844b2addecc0d2ad6a4dfc4da888a
parent0af2f6be1b4281385b618cb86ad946eded089ac8
riscv: dts: sophgo: fix DMA data-width configuration for CV18xx

The "snps,data-width" property[1] defines the AXI data width of the DMA
controller as:

    width = 8 × (2^n) bits

(0 = 8 bits, 1 = 16 bits, 2 = 32 bits, ..., 6 = 512 bits)
where "n" is the value of "snps,data-width".

For the CV18xx DMA controller, the correct AXI data width is 32 bits,
corresponding to "snps,data-width = 2".

Test results on Milkv Duo S can be found here [2].

Link: https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/dma/snps%2Cdw-axi-dmac.yaml#L74
Link: https://gist.github.com/Sutter099/4fa99bb2d89e5af975983124704b3861
Fixes: 514951a81a5e ("riscv: dts: sophgo: cv18xx: add DMA controller")
Co-developed-by: Yu Yuan <yu.yuan@sjtu.edu.cn>
Signed-off-by: Yu Yuan <yu.yuan@sjtu.edu.cn>
Signed-off-by: Ze Huang <huangze@whut.edu.cn>
Link: https://lore.kernel.org/r/20250428-duo-dma-config-v1-1-eb6ad836ca42@whut.edu.cn
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
arch/riscv/boot/dts/sophgo/cv18xx.dtsi