]> www.infradead.org Git - users/hch/block.git/commit
clk: renesas: r9a09g057: Add clock and reset entries for GTM/RIIC/SDHI/WDT
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Wed, 28 Aug 2024 09:38:22 +0000 (10:38 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 2 Sep 2024 08:15:38 +0000 (10:15 +0200)
commit3aeccbe08171b79f82fb802393a6324c7b732669
tree98b230795f7adcefccb97c7eae80f46780d89492
parentbc4d25fdfadfa80dc3ba690792b5220d50ea7b52
clk: renesas: r9a09g057: Add clock and reset entries for GTM/RIIC/SDHI/WDT

Add clock and reset entries for Generic Timer (GTM), I2C Bus Interface
(RIIC), SD/MMC Host Interface (SDHI) and Watchdog Timer (WDT) IP blocks.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828093822.162855-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a09g057-cpg.c
drivers/clk/renesas/rzv2h-cpg.h