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target/arm: Add zt0_excp_el to DisasContext
authorRichard Henderson <richard.henderson@linaro.org>
Fri, 4 Jul 2025 14:19:39 +0000 (08:19 -0600)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 4 Jul 2025 14:52:21 +0000 (15:52 +0100)
commit3aad4bc8beb9a3a8c1ea3dc6ca9bfc85d3c7c8a4
tree5be64cfd336f61d16b1b9b467b64a8c3a30ac438tree
parent694b2625dd4ac1d6f4aa4dfc8ed7380ec843cd9bcommit | diff
target/arm: Add zt0_excp_el to DisasContext

Pipe the value through from SMCR_ELx through hflags and into
the disassembly context.  Enable EZT0 in smcr_write.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250704142112.1018902-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/cpu.c diff | blob | history
target/arm/cpu.h diff | blob | history
target/arm/helper.c diff | blob | history
target/arm/tcg/hflags.c diff | blob | history
target/arm/tcg/translate-a64.c diff | blob | history
target/arm/tcg/translate.h diff | blob | history
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