]> www.infradead.org Git - users/jedix/linux-maple.git/commit
arm64: dts: ti: Introduce J742S2 SoC family
authorManorit Chawdhry <m-chawdhry@ti.com>
Mon, 2 Sep 2024 12:26:52 +0000 (17:56 +0530)
committerVignesh Raghavendra <vigneshr@ti.com>
Sat, 12 Oct 2024 22:03:25 +0000 (03:33 +0530)
commit38fd90a3e1ac7e948081cf168cf10f0a20febc21
treebe1321ae1fbb1196f0bf8fcf7a693a5a27e7dd79
parent9c65033884bfec836fe45f21d079de40fc7c7bda
arm64: dts: ti: Introduce J742S2 SoC family

This device is a subset of J784S4 and shares the same memory map and
thus the nodes are being reused from J784S4 to avoid duplication.

Here are some of the salient features of the J742S2 automotive grade
application processor:

The J742S2 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration in automotive, ADAS and industrial
applications requiring AI at the network edge. This SoC extends the K3
Jacinto 7 family of SoCs with focus on raising performance and
integration while providing interfaces, memory architecture and compute
performance for multi-sensor, high concurrency applications.

Some changes that this devices has from J784S4 are:
* 4x Cortex-A72 vs 8x Cortex-A72
* 3x C7x DSP vs 4x C7x DSP
* 4 port ethernet switch vs 8 port ethernet switch

( Refer Table 2-1 for Device comparison with J7AHP )

Link: https://www.ti.com/lit/pdf/spruje3
Reviewed-by: Beleswar Padhi <b-padhi@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20240902-b4-upstream-j742s2-v6-4-6a7aa2736797@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
arch/arm64/boot/dts/ti/k3-j742s2-main.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/ti/k3-j742s2.dtsi [new file with mode: 0644]