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target/arm: Honor the HCR_EL2.TPU bit
authorRichard Henderson <richard.henderson@linaro.org>
Thu, 5 Mar 2020 16:09:18 +0000 (16:09 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 5 Mar 2020 16:09:18 +0000 (16:09 +0000)
commit38262d8a732f8bd0e9ca3dc064f6e73d00c08b9a
tree9ae03ff18a901b5d1897d4d2beefad2d4e430c9atree
parent1bed4d2e55459129c19f5952bcfc65bd0c70db5bcommit | diff
target/arm: Honor the HCR_EL2.TPU bit

This bit traps EL1 access to cache maintenance insns that operate
to the point of unification.  There are no longer any references to
plain aa64_cacheop_access, so remove it.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200229012811.24129-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/helper.c diff | blob | history
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