]> www.infradead.org Git - users/jedix/linux-maple.git/commit
acpi/ghes, cxl/pci: Process CXL CPER Protocol Errors
authorSmita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
Mon, 10 Mar 2025 22:38:38 +0000 (22:38 +0000)
committerDave Jiang <dave.jiang@intel.com>
Fri, 14 Mar 2025 21:21:45 +0000 (14:21 -0700)
commit36f257e3b0ba904f5a4e7fa8dafaa60e88cdd28c
tree16639e4dbebf2772b1574fc8f8815aa2bab9cb07
parent315c2f0b53ba2645062627443a12cea73f3dad9c
acpi/ghes, cxl/pci: Process CXL CPER Protocol Errors

When PCIe AER is in FW-First, OS should process CXL Protocol errors from
CPER records. Introduce support for handling and logging CXL Protocol
errors.

The defined trace events cxl_aer_uncorrectable_error and
cxl_aer_correctable_error trace native CXL AER endpoint errors. Reuse them
to trace FW-First Protocol errors.

Since the CXL code is required to be called from process context and
GHES is in interrupt context, use workqueues for processing.

Similar to CXL CPER event handling, use kfifo to handle errors as it
simplifies queue processing by providing lock free fifo operations.

Add the ability for the CXL sub-system to register a workqueue to
process CXL CPER protocol errors.

[DJ: return cxl_cper_register_prot_err_work() directly in cxl_ras_init()]

Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
Reviewed-by: Li Ming <ming.li@zohomail.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://patch.msgid.link/20250310223839.31342-2-Smita.KoralahalliChannabasappa@amd.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
drivers/acpi/apei/ghes.c
drivers/cxl/core/Makefile
drivers/cxl/core/core.h
drivers/cxl/core/port.c
drivers/cxl/core/ras.c [new file with mode: 0644]
include/cxl/event.h
tools/testing/cxl/Kbuild