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phy: qcom-qmp-pcie: Add RC init sequence for SDX55
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Wed, 8 Mar 2023 08:24:23 +0000 (13:54 +0530)
committerVinod Koul <vkoul@kernel.org>
Mon, 20 Mar 2023 12:44:55 +0000 (18:14 +0530)
commit364c748d5e085a4cf425bbca90482e8df77d022e
tree0720ffc8fbda19744850e581038eda1e7d335a01tree
parent458aa82041ce3cd46ff5f9afd078f62a683daa28commit | diff
phy: qcom-qmp-pcie: Add RC init sequence for SDX55

Add PCIe RC init sequence making use of the common init sequence. The RC
mode additionally requires REFCLK_DRV_DSBL bit to set during powerup and
powerdown.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20230308082424.140224-13-manivannan.sadhasivam@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c diff | blob | history
drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v4_20.h diff | blob | history
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