]> www.infradead.org Git - users/jedix/linux-maple.git/commit
drm/i915/watermark: Check bounds for scaler_users for dsc prefill latency
authorAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Thu, 27 Feb 2025 03:41:06 +0000 (09:11 +0530)
committerJani Nikula <jani.nikula@intel.com>
Thu, 20 Mar 2025 16:27:17 +0000 (18:27 +0200)
commit32a43b6014662f1227c906c9de00886aecc0a508
tree66d612fb21414bf0467a369809afa085e4457874
parent5da39dce1fa3c81dc6552a16a9f748ba2980d630
drm/i915/watermark: Check bounds for scaler_users for dsc prefill latency

Currently, during the computation of global watermarks, the latency for
each scaler user is calculated to compute the DSC prefill latency.
At this point, the number of scaler users can exceed the number of
supported scalers, which is checked later in intel_atomic_setup_scalers().

This can cause issues when the number of scaler users exceeds the number
of supported scalers.

While checking for DSC prefill, ensure that the number of scaler users does
not exceed the number of supported scalers.

Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/4341
Fixes: a9b14af999b0 ("drm/i915/dsc: Check if vblank is sufficient for dsc prefill")
Cc: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250227034106.1638203-1-ankit.k.nautiyal@intel.com
(cherry picked from commit 5d6c69b712f9cb34063ef32168ce6a12af8acf0c)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/skl_watermark.c